The evolution of the CdTe detectors properties requires a continuous improvement
of the electronic frond-end in terms of geometry, noise, and power consumption.
This is why our group is working on a new modular spectro-imaging system based
on CdTe detectors coupled to dedicated full custom readout ASICs, named IDeF-X
for Imaging Detector Front-end. The development of the IDeF-X front-end ASIC
includes several steps from its first version as a set of stand-alone preamplifier
prototypes to a complex multi-channel (32 to 256) circuit for high-pixel density
CdTe readout. The first ASIC, named IDeF-X V0 was designed to evaluate the
AMS 0.35µm CMOS technology and to choose the best suited charge sensitive
preamplifier (CSA) design. We present a new version of IDeF-X which is a complete
16 channels analogue front-end. The chip has been optimized for high resolution,
X ray or gamma ray spectroscopy (4 to 300 keV). Each channel includes a preamplifier
(one of the PMOS input type CSA characterized in IDeF-X V0), a continuous reset
system with a leakage current self adaptable, a pole zero cancellation system and
a variable peaking time fourth order Sallen & Key type shaper. The electronic chain
is optimized for detector capacitance in the range of 2 to 5pF. This device (ASIC + detector)
is planned to be used in large area cameras (100 to 1000 cm²) for space borne astrophysics. |
