| Nuno Almeida, Philippe Busson, Jean-Louis Faure, Olivier Gachelin, Philippe Gras,
Irakli Mandjavidze, Michel Mur, Joao Varela |
This paper describes the selective read-out processor
(SRP) proposed for the electromagnetic calorimeter (ECAL) of
the CMS experiment at LHC (CERN). The aim is to reduce raw
ECAL data to a level acceptable by the CMS DAQ system. For
each positive level 1 trigger, the SRP is guided by trigger
primitive generation electronic to identify ECAL regions with
energy deposition satisfying certain programmable criteria. It
then directs the ECAL read-out electronic to apply predefined
zero suppression levels to the crystal data, depending whether the
crystals fall within these regions or not. About 200 of high speed
1.6 Gbit/s I/O channels, asynchronous operation at up to 100 kHz
level 1 trigger rate, a stringent real-time requirement of 5 µs
latency and flexibility in choice of selection algorithms are the
main challenges of the SRP application. The architecture adopted
for the SRP is based on modern parallel optic pluggable modules
and high density FPGA devices with embedded processors and
multi-gigabit transceivers. Implementation studies to validate
proposed solutions are presented. The performance of envisaged
selection algorithms is investigated with the CMS detector
simulation software. The robustness of optical communication
channels is estimated via direct measurements and calculations.
The feasibility to perform data reduction operations within the
allocated timing budget is verified by running a representative
SRP firmware on a development board with a Xilinx Virtex2Pro
FPGA device. |
